One prior art frequency synthesizer utilizes a reference frequency oscillator which drives a pulse deleter and a frequency divider in parallel. The frequency divider derives a square wave output having a frequency that is a sub-multiple of the reference frequency, such that the output frequency of the frequency divider is represented as F.sub.R /K.sub.1, where F.sub.R equals the frequency of the reference frequency oscillator and K.sub.1 is the frequency division factor of the frequency divider. The square wave output of the frequency divider is applied to an accumulator having a maximum capacity of M and which can be set to derive a carry output in accordance with a predetermined input digit N. Thereby, the carry output of the accumulator has a frequency related to the input frequency of the accumulator in accordance with F.sub.C =F.sub.1 N/M, where F.sub.C equals the output frequency of the accumulator and F.sub.1 equals the input frequency of the accumulator. Thus, the output frequency of the accumulator is represented as F.sub.C =F.sub.R N/MK.sub.1. The output frequency of the accumulator is applied as a control input to the pulse deleter, such that for each output of the accumulator one pulse is removed from the wave of the reference frequency oscillator. Thus, the pulse deleter derives an output wave having a frequency F.sub.D =F.sub.R (1-N/K.sub.1 M). The output of the pulse deleter is applied to a second frequency divider, having a frequency division factor K.sub.2. The output frequency of the second frequency divider is thus represented as F.sub.0 =F.sub.R /K.sub.2 (1-N/K.sub.1 M).
This prior art device thus can be utilized as a digitally controlled synthesized oscillator. Alternatively, the output frequency of the oscillator, F.sub.0, is digitally controlled by a suitable source, such as a keyboard, in accordance with the value of N. The prior art circuitry including the pulse deleter, frequency divider circuity and, if required, accumulator circuit can be utilized to selectively delete pulses from a source other than a reference frequency source and in applications other than as a digitally controlled oscillator.
The prior art circuit functions admirably in low frequency situations. However, if the reference frequency oscillator or a pulse source has a very high frequency, such as 100 MHz, it is difficult to provide a pulse deleter capable of reacting in sufficient time to delete one pulse from such a source. The pulse deleter in the prior art device must be able to change state from a non-delete state to a state in which a single pulse from the reference frequency source or the pulse train is deleted and be reset back to the non-delete state within one cycle of the reference frequency source or one pulse of the pulse source. For a 100 MHz source, such changes of state must occur within an interval of ten nanoseconds. Otherwise, the pulse deleter section is not able to delete a single pulse from the source. Presently available pulse deleters employ Schottky transistor transistor logic which have propagation delays in excess of the ten nanosecond period of one cycle of a 100 MHz source. In addition, the propagation delay of the Schottky transistor transistor logic pulse deleters changes as a function of temperature. Thus, unpredictable results occur if the typical prior art devices are employed.
It is, accordingly, an object of the present invention to provide a new and improved frequency synthesizer.
Another object of the invention is to provide a new and improved pulse control circuit.
A further object of the invention is to provide a new and improved digitally controlled frequency synthesizer or pulse control circuit which is capable of accurately handling reference frequencies or pulse sources of the order of 100 MHz.
A further object of the invention is to provide a new and improved digitally controlled synthesizer or pulse control circuit wherein pulses are selectively deleted from a reference frequency source or a pulse source without the requirement of reacting immediately to a single cycle of the source.
An additional object of the invention is to provide a new and improved frequency synthesizer responsive to a reference frequency source or a pulse deleter circuit wherein a single cycle of the source is selectively removed from a series of cycles of the source, but wherein many cycles of the source can be used by a circuit to remove the single cycle.